(1) Field of the Invention
The present invention relates to a liquid crystal display device using an amorphous silicon thin film transistor (TFT), and more particularly to a high-definition liquid crystal display device having a conductive light shielding film at a transistor substrate side.
(2) Description of the Related Art
A liquid crystal display device of the kind to which the present invention relates is proposed in, for example, Japanese Patent Application Kokai Publication No. Hei 3-50527. The proposal relates to a thin film transistor array substrate comprising a light shielding film provided on a glass substrate and having an open portion (an aperture) at a pixel electrode formation region, an interlayer insulating film provided on a surface including the light shielding film, a thin film transistor provided on the interlayer insulating film on the light shielding film, and a display electrode provided on the interlayer insulating film so as to be connected with the thin film transistor and be in alignment with the open portion. The light shielding of the TFT region other than the pixel electrode formation region is effected by the light shielding film provided on the glass substrate, and this light shielding suppresses an increase in the TFT off-current caused by back light irradiation, and shields the leakage light from outside the pixel electrode.
The above prior art thin film transistor array substrate is shown in FIGS. 1, 2 and 3, FIG. 1 being a plan view of a unit pixel, FIG. 2 being a sectional view taken along line 2--2 of FIG. 1, and FIG. 3 being a sectional view taken along line 3--3 in FIG. 1.
In FIG. 1, the numeral 1 is for a gate electrode, 2 is for a semiconductor layer, 3 is for a drain electrode, 4 is for a source electrode, 5 is for a pixel electrode, 7 is for an end of a TFT side conductive light shielding film, 6 is for an open portion, 11 is for a scanning signal line, and 12 and 13 are for image signal lines. The unit pixel is formed at a region surrounded by the scanning signal line 11 and the image signal lines 12 and 13. The electrical connection is established between the gate electrode 1 of the TFT and the scanning signal line 11, between the drain electrode and the image signal line 12, and between the source electrode 4 and the pixel electrode 5, and the conductive light shielding film having the open portion 6 is provided at the pixel electrode formation region on the glass substrate.
The structure shown in FIGS. 2 and 3 are formed by depositing a Cr film on a glass substrate 100 by a sputtering process, and the portion of the Cr film that corresponds to the pixel electrode formation region is selectively etched so as to form an opening, thus forming the light shielding film 116. Then, a nitride silicon film is deposited on a surface including the light shielding film 116 by a CVD process, thus forming a light shielding layer insulating film 114.
Next, a Cr film is deposited on the light shielding layer insulating film 114, and this is selectively etched so as to form a gate electrode 111 on the light shielding film 116. Thereafter, a nitride silicon film is deposited on a surface including the gate electrode 111 thereby forming a gate insulating film 115.
On the gate insulating film 115 corresponding to the gate electrode 111, there are selectively formed an amorphous silicon film 119 and an n.sup.+ type amorphous silicon layer 119a provided on a surface of the amorphous silicon film and, on the gate insulating film 115 over an open portion of the light shielding film 116, a pixel electrode 105 is formed with the ITO film being selectively provided. Here, the pixel electrode 105 is provided so as to partly overlap peripheral portions of the opening of the light shielding film 116.
Next, a Cr film is deposited on a surface including the amorphous silicon film 119, and the resulting film is selectively etched whereby a drain electrode 113 and a source electrode 118 are formed.
Using the source/drain electrodes 118 and 113 as masks, the n.sup.+ type amorphous silicon layer 119a at a region corresponding to the gate electrode 111 is etched away, thus forming a thin film transistor array substrate. In the arrangement shown in FIG. 4, the light shielding film 116 and the opposing electrode 121 are of the same potential (=V.sub.com) so that the charging capacitor is formed between the light shielding film 116 and the pixel electrode 105.
An equivalent circuit of one pixel in the prior art liquid crystal display device is shown in FIG. 5. The light shielding layer insulating film 114 and the gate insulating film 115 constitute a capacitor between the pixel electrode 5 and the light shielding film 116, and the same potential V.sub.com as for the light shielding film 116 is applied to the opposing electrode 121 which, together with the pixel electrode 105, sandwiches the liquid crystal 130.
In the above prior art example, no light shielding film is disposed on the TFT back channel so that there is a problem with regard to light shielding characteristics.
A thin film transistor array provided with a light shielding film on a back channel is disclosed, for example, in Japanese Patent Application Kokai Publication No. Sho 60-192370. In this example, a metal light shielding film on the back channel is coupled to either a first stage or a second stage of a gate line. A unit pixel of the thin film transistor array disclosed in the Japanese Patent Application Kokai Publication No. Sho 60-192370 is shown in a plan view in FIG. 6. FIG. 7 shows a sectional view taken along line 7--7 in FIG. 6, and FIG. 8 shows a sectional view taken along line 8--8 in FIG. 6.
In FIG. 6, the numeral 1 is for a gate line as a scanning signal line, 119 is for a semiconductor layer, 3 is for a drain electrode, 4 is for a source electrode, and 5 is for a pixel electrode.
In FIGS. 7 and 8, the numeral 100 is for a glass substrate, 1 is for a gate electrode, 3 is for a drain electrode, 4 is for a source electrode, 115 is for a gate insulating film, 144 is for a common electrode constituted by a transparent conductive layer, 145 is for an interlayer insulating film, 5 is for a pixel electrode, 117 is for a passivation insulating film, and 14 is for a conductive light shielding film on a TFT back channel.
As shown in FIG. 8, the conductive light shielding film 14 of a metal such as Cr on the TFT back channel is connected to a first stage gate electrode 1.
A thin film transistor in which a light shielding film on a back channel is connected to either a source electrode or a drain electrode is disclosed, for example, in Japanese Utility Model Application Kokai Publication No. Hei 3-42124. In this example, as shown in FIG. 9, a back channel side conductive light shielding film 14 formed of a metal is provided on a passivation insulating film 117 on a side opposite to the gate electrode 1ll with a semiconductor layer of an amorphous silicon film 119 and/or an n.sup.+ type amorphous silicon layer 119a being sandwiched therebetween, and the conductive light shielding film 14 is electrically coupled to a drain electrode 3 of the TFT.
In these example s disclosed in the above Japanese Patent Application Kokai Publication No. Sho 60-192370 and Japanese Utility Model Application Kokai Publication No. Hei 3-42124, the back channel side light shielding film fulfills also a role of a back gate, but the potential thereof changes with time and, moreover, cannot be provided as desired or selectively.
In each of the prior art liquid crystal display elements explained hereinabove, there is a trend that, when the element becomes highly defined, the lateral electric field between the pixel electrode and the TFT, the gate scanning line, and the image signal line, increases at the periphery of the pixel electrode (FIG. 4) and, as a consequence, the electric field which is expected to be in the vertical direction towards the liquid crystal between the pixel electrode and the opposing electrode is disturbed. For this reason, a disclination caused by a reverse tilt and a reverse twist of the liquid crystal is apt to occur around the pixel.
The light is constantly transmitted at portions where a disclination occurs, thereby degrading the quality of display. Also, the disclination causes the open portions to move, and this is observed by the user as a residual image.